To design and simulate a Clamper circuit.
A clamper is an electronic circuit that prevents a signal from exceeding a certain defined magnitude by shifting its DC value. The clamper does not restrict the peak-to-peak excursion of the signal, but moves it up or down by a fixed value. A diode clamp (a simple, common type) relies on a diode, which conducts electric current in only one direction; resistors and capacitors in the circuit are used to maintain an altered dc level at the clamper output. The different types of clampers are positive negative and biased clampers. A positive clamp circuit outputs a purely positive waveform from an input signal; it offsets the input signal so that all of the waveform is greater than 0 V. A negative clamp is the opposite of this - this clamp outputs a purely negative waveform from an input signal. A clamping network must have a capacitor, a diode and a resistive element. The magnitude R and C must be chosen such that the time constant RC is large enough to ensure that the voltage across the capacitor does not discharge significantly during the interval the diode is non- conducting.
The circuit for a positive clamper is shown in the figure. During the negative half cycle of the input signal, the diode conducts and acts like a short circuit. The output voltage Vo = 0V. The capacitor is charged to the peak value of input voltage Vm. And it behaves like a battery. During the positive half of the input signal, the diode does not conduct and
acts as an open circuit. Hence the output voltage Vo = Vm+ Vm. This gives a positively clamped voltage.
During the positive half cycle the diode conducts and acts like a short circuit. The capacitor charges to peak value of input voltage Vm. During this interval the output Vowhich is taken across the short circuit will be zero.
During the negative half cycle, the diode is open. The output voltage can be found by applying KVL.
The circuit of a positively biased clamper is shown in the figure. During the negative half cycle of the input signal the diode is forward biased and acts like a short circuit. The capacitor charges to Vi + Vs . Applying the KVL to the input side.
The voltage across the resistor will be equal to the source voltage Vs.
During the positive half cycle of the input signal, the diode is reverse biased and it acts as an open circuit. Hence Vs has no effect on Vo.